Shapes of things to come: Nvidia’s foray into litho bolsters curvy chip designs

There are times when I watch a presentation and wonder if I’ve travelled back in time. Though the keynote at Nvidia’s Spring GTC was, as at the prior events, relentlessly focused on AI and the reformulation of virtual reality as the metaverse, that is pretty much par for the course for Silicon Valley conglomerates right now. 

The bit that felt like falling through a hole in time to 2010 was around Nvidia’s foray into software for chipmakers. The cuLitho library, similar to the those the company has released for AI, graphics and simulation, is meant to underpin software that tweaks shapes on the masks used to help form nanometre-scale features on the surface of a chip. According to Nvidia, using GPUs will speed up this process by orders of magnitude. However, things have been that way for some time.

At one point, lithography engineers thought progress might stop at around 1µm. They sailed through that perceived barrier back in the 1980s and have for about 20 years doing the seemingly impossible using optical proximity correction (OPC) software. Even the more advanced technology of inverse lithography got under way at companies such as IBM in the early 2000s, when it became clear there was nothing on the horizon to take over from near-ultraviolet light at 198nm even as minimum feature sizes shrank to 180nm and smaller. Because of diffraction effects that increase rapidly as you scale features close to the wavelength used to create them, Ken Rygler, who founded DuPont Photomasks in the mid-1980s, often described the problem as trying to paint a one-inch line with a three-inch brush.

EUV at 14nm was on the roadmap but kept being pushed back. The industry was working with feature sizes of less than 40nm before it began to look viable. But optical trickery in the form of OPC was up to the task, with a little help from designers who agreed to limits on their flexibility to make sure the lines printed at all. Inverse lithography is the culmination of that work. Instead of adding little serifs and bars to straight lines to make them come out vaguely straight on the final chip surface, inverse lithography is similar to holography. What you carve into the mask looks nothing like the target image, but you wind up with something recognisable thanks to all the tiny phase cancellations that result from light beams diffracting and scattering off the edges of the shapes.

In practice, there is no single image that is the inverse of the target shape. Many different arrangements can yield the same image, so inverse lithography is also partly an optimisation process. And a lengthy one at that, which is why acceleration is crucial.

Mentor Graphics, now part of Siemens, did a deal with IBM more than a decade ago for inverse-lithography technology and looked at using the Cell processor because it represented the best bang for the buck at the time. For companies operating in the mask-writing business, the GPU has proved to be a longer-term winner. 

“Having Nvidia's help and making easier for everybody is only going to accelerate the adoption of GPUs. I think, in general, it is the right thing to do, thinking about the industry as a whole. We’ve been doing it for a while, and the more the world recognises that GPU is the right way to go for these kinds of things, the better off we're going to be,” says Aki Fujimura, chairman and CEO of D2S, a company that specialises in mask-writing acceleration. 

To some extent, the arrival of EUV took the heat off OPC: with 14nm-wavelength light, you do not need such aggressive transformations in the mask, though there are so many features needed that the mask-creation process needs a lot of horsepower and memory. But other things are happening which means launching a GPU-acceleration library for OPC is not as anachronistic as it might at first seem. 

There is a key difference that appears to lie at the heart of the cuLitho library and the approach that a supplier such as D2S has taken. Fujimura is keen to stress the approach of pixel-based based processing. Traditionally, mask writing was a shape-based process, and one that used square shapes pretty much exclusively. The workhorse machine used to produce the masks prints squares of different sizes on the target using a variable aperture. Gradually this variable shaped beam (VSB) gear is giving way to the far more flexible multibeam writer, which is entirely pixel-based and can produce arbitrary patterns far more easily and quickly than a VSB machine.

According to surveys, practically all of the multibeam machines are being used to make EUV masks rather than masks for the older 198nm lithography scanners. Though the OPC required is less aggressive, inverse lithography has a major role to play. Pixel-based processing working in concert with inverse lithography and multibeam writers makes it a lot easier to consider an approach to chip design that manufacturers have traditionally shied away from but which, in some hands, is leading to improvements in yield. Though every chip layout that sits on a screen is full of rectangles, the final result on the chip itself looks pretty different even today.

Fujimura points out that though common features, such as the metal vias that electrically connect traces on two different metal layers, are square, “everybody knows it’s going to become a cylinder”.

Some manufacturers have begun to embrace this transformation. Micron and TSMC, for example, have demonstrated that embracing the fact that shapes on the wafer turn out to be more circular than square improves yield and can be used to squeeze things together more tightly. Being a memory maker, Micron can more easily make use of the fact. Its engineers can fine-tune the shapes of memory cells in great detail and just step and repeat them across the chip. TSMC, on the other hand, caters mainly to logic designers where the layouts are heavily automated and based on classical Manhattan-style grids.

In principle, teams sending their processors and SoCs to TSMC could use a lot more curved shapes, but that would require major changes in the EDA tools. Some companies have said they will support such a move. Siemens is one of them. And it appears TSMC and Synopsys, as well as scanner maker ASML, have joined by saying they will use Nvidia’s cuLitho, which has curvilinear design in its targets. Though perhaps not immediately. 

Though Vivek Singh, vice president of the advanced technology group at Nvidia, claimed at GTC that the computational power for inverse lithography has been lacking, D2S has shown, working at the pixel level maps onto GPUs pretty well. The Fourier transforms and other algorithms you need to perform inverse lithography parallelise reasonably well across their single-instruction, multiple-data pipelines and across the array of processors. Indeed, when Singh was at Intel, he wrote a paper espousing the virtues of pixel-based processing.

The tricky bit with the pixel-based approach is that gap between what is best for the mask and yield and how designs are put together. If you look a little more closely at what cuLitho introduced, the novel part of it is focused on a slightly different area from the pixel-based domain of D2S.

”The imaging part of computational lithography can be represented by convolutions, or matrix multiplications, which are inherently amenable to parallelisation,” Singh explains. “All the remaining operations, however, have historically proven to be bigger bottlenecks, and this has limited the acceleration of end-to-end OPC tools.”

The operations that have now been parallelised by cuLitho have a lot more to do with Euclidean geometry: looking for overlaps between rectangles and fracturing these Manhattan designs into graphical objects that can be mapped onto the wafer image, and which may well wind up being a lot more curved. These operations have largely been limited to execution on conventional CPUs, so Nvidia reckons speed-ups of 40-fold are achievable using its Hopper GPUs.

Fujimura notes that the elements of cuLitho highlighted at GTC focus more on the traditional OPC end of things where the processing is more likely to be on rectangular shapes and edges rather than being transformed into an array of pixels. “They're anticipating what kinds of library components would be useful for people to be able to do a good job on GPUs from the outset and make it easier for companies to move their code to being CPU- to GPU-based.

“The majority of customers are CPU-based. And when they do GPU acceleration, the right thing for them to do is to stay in edge-based for the moment. But we take a different approach,” Fujimura adds. For D2S, the probable direction of travel is for the ability to define arbitrary shapes enabled by multibeam mask writing and pixel-based processing to move into the hands of chip designers. “I personally think that using curvilinear designs is the ultimate form of design for manufacturability.”

The chances are many parts of the layout will be treated as straight lines. Fujimura reckons transistors will continue to be treated as rectangular, even if they get a bit rounded off at the ends. But the tiny tracks that connect them together, particularly in the closely packed 'cells' that EDA tools typically link together to form complete circuits, would benefit greatly from the curved approach. If the curved lines were kept inside the cells, this may prove a manageable way for the tools providers to build support for curvilinear designs into their layout software. The cells tend to be treated as black boxes with only the final design-rules checks and tests being required to understand these shapes are now curved.

Is it happening? The Nvidia move suggests yes and so does Fujimura, though it may take a while for it to be widespread in design. “In 2022, the big transformation happened. In 2021 curvilinear masks were being talked about as a good thing, that it’s good for quality. Then it became a done deal. Everybody's going to do curvilinear masks for EUV, specifically for EUV at the 2nm node and below. They don't do it now. But it's quite a transition in only two or three years. And it's pretty much: if you don't do it, you're behind.”

Could curvilinear move back to older nodes if successful at the bleeding edge? Possibly, but not universally. Fujimura points out that fab operators do not like changing things once they have a process running smoothly, which limits the ability for curvilinear design to ease in. “Once something works, better is different. And different is bad.”

However, technologies such as integrated photonics, which require curved shapes, and novel processes developed for the kinds of low-cost, low-energy chips needed for the internet of things (IoT), could be beneficiaries. 

Speed-ups for mask production through edge-based GPU processing will likely streamline production on new masks for older processes and the upper metal layers on bleeding-edge chips, which continue to use 198nm lithography. So, despite being launched in a way that suggested Nvidia was still living in 2010, it does appear to be focused on 2025 and beyond.