Chip democratisation leads to open-source choices

Some 30 years ago the gate array was flying high, enthusiastically supported by vendors such as LSI Logic and VLSI Technology, but at the same time at increasing risk of becoming an endangered species. A decade later it was practically over. Structured gate arrays persisted for a while but unless you could afford the mask costs for a standard-cell ASIC, you were no longer in the business of buying custom chips. The FPGA was now your main option.

At the leading edge the economics have certainly not improved for anyone who cannot command high volumes or operating margins. Design costs have spiralled up as well for chips at these advanced nodes, though primarily in verification, validation, and software development. The idea of democratising design with these trends in the background seems counter-intuitive. But others suggest there is demand for easier, cheaper access to custom silicon and that a growing number of design teams can justify the switch from software or FPGA to ASIC or SoC.

One is the reduction of non-recurrent engineering (NRE) costs for older nodes that lack the extreme density of 3nm or 5nm but which can readily support the needs for teams who want to cut power or boost performance either in smaller devices or in designs that augment standard SoCs with functions accelerated for a specific set of tasks. 

Though there is not easy access to prototype quantities of multi-chip modules in the same way there are low-cost multi-project wafers or shuttles for ASICs and SoCs, there is a growing expectation that chiplet-based design will be a viable option in the future to support the need for customised high-volume silicon. 

Then there is design, where the movement over the past few years has been significant. For processor cores, RISC-V now offers a wide range of options: whether free and open-source or commercial paid-for. And DARPA’s sponsorship of the OpenRoad toolchain alongside a growing armoury of EDA software provides more accessible options for teams that either do not want to pay or want to try out options without having to enter into lengthy licence negotiations, even if they choose to move to a commercial flow later on.

During a panel on design democratisation at the Design Automation Conference (DAC) in San Francisco, Chips Alliance general manager Rob Mains said: “We are looking for an informed democracy of designers. To create that community, we need to lower the barriers of complexity that have previously been seen in the engineering ranks. It is about making EDA more accessible without the legal entanglements.”

Tony McDowell, director of open source at Rapid Silicon, added: “Equity of access is really important for this industry.”

OpenRoad and some of the other open-source efforts have placed a premium on technical simplicity. Professor Andrew Kahng of the University of California at San Diego has emphasised the pushbutton intent of OpenRoad. In principle, a design can go from RTL to GDS with comparatively little intervention, though this may involve fewer choices than with traditional flows. 

On a conference panel dedicated to open-source EDA issues, Peter Gadfort, team leader for silicon technologies in DEVCOM Army Research, pointed to the clock-tree synthesis in OpenRoad, “It’s a one-size-fits-all solution. More work is needed to make that a more fully fledged solution.”

Though proponents point to the relative simplicity of open-source licences – the MIT version runs to less than a page – and the lack of requirement to negotiate with a commercial supplier, the legal aspects can cause headaches for designers. 

“We’re going to need our engineers to pay attention to licences and reuse. How do we make sure our engineers know how to do that?” said McDowell.

Mains added: “You have to be very careful to pay attention to the licence agreements, which is not something the average engineer pays attention to.” Not paying attention to the differences between commercial and open-source licences can lead to IP becoming ‘infected’, Mains noted. “So that it's unusable for open-source licensing.

“[Another] key challenge of open source is to build a level of confidence and trust in it,” said Mains. “If you are pulling in the RTL for a particular macro, how do you know it's good? It comes back to building trust. There is always going to be room for proprietary solutions as well as open source.”

The models are not necessarily either-or, as has happened with open-source for software applications where support provides a mechanism for building business models. Whether those business models translate directly is another matter. Rick O’Connor, president and CEO of the Open Hardware Group, said: “How do we share easily and create economic models around this? And take advantage of open source in the same way as software engineers are now able to.”

Vic Kulkarni, chief strategy officer of the Silicon Integration Initiative (SI2), added: “We need to create a hierarchy of business models.”

The big problem when it comes to business models is that the money for design collects at the head, controlled by the biggest players: the long tail gets to work with the scraps. It’s possible that enough users come into the market to create one or more viable self-sustaining businesses away from the FAANGs and the traditional chip companies. One thing in  favour of the democratisation argument is that cost-per-transistor is no longer falling the way it was for those working at the leading edge. This makes competition from those operating on older nodes that are cheaper more likely to emerge.

In the past, the economics of Moore’s Law would simply have stomped them into the ground. Similarly, the power efficiency advantage at the leading edge is not what it was. Combined, there is a potential commercial opening for smaller, smart players just as long as they can combine hardware and software in a way that more established players cannot. Easier access through open-source tools and other programmes may give them the start they need.