Micron's state-of-the-art DRAM stacked atop high-performance logic

Samples of revolutionary memory technology shipped

Micron has today announced it is shipping engineering samples of its revolutionary Hybrid Memory Cube memory technology.

The HMC is the result of a consortium formed in late 2011 by Micron, Samsung, Altera, Xilinx and Open-Silicon to define an industry interface specification for developers, manufacturers and architects of high-performance memory technology.

The device is designed for applications requiring high-bandwidth access to memory, including data packet processing, data packet buffering or storage, and computing applications such as processor accelerators.

The revolutionary new architecture uses advanced through-silicon vias (TSVs) – vertical conduits that electrically connect a stack of individual chips – to combine high-performance logic with Micron's state-of-the-art dynamic random access memory (DRAM).

It features a 2GB memory cube that is composed of a stack of four 4Gb DRAM die. The solution provides an unprecedented 160 GB/s of memory bandwidth while using up to 70 per cent less energy per bit than existing DRAM technologies.

"The HMC is a smart fix that breaks with the industry's past approaches and opens up new possibilities," said Jim Handy, a memory analyst at Objective Analysis.

"Although DRAM internal bandwidth has been increasing exponentially, along with logic's thirst for data, current options offer limited processor-to-memory bandwidth and consume significant power. HMC is an exciting alternative."

Micron claims the HMC's abstracted memory enables designers to devote more time to unlocking the devices revolutionary features and performance and less time to navigating the multitude of memory parameters required to implement basic functions.

It also manages error correction, resiliency, refresh, and other parameters exacerbated by memory process variation.

"System designers are looking for new memory system designs to support increased demand for bandwidth, density, and power efficiency," said Brian Shirley, vice president of Micron's DRAM Solutions Group.

"HMC represents the new standard in memory performance; it's the breakthrough our customers have been waiting for."

Micron expects 4GB HMC engineering samples to be available in early 2014 with volume production of both the 2GB and 4GB HMC devices beginning later in 2014 with future generations of HMC expected to migrate to consumer applications within three to five years.

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