FPGA development environments will stand to gain from enhanced HDL generation.

Matlab upgrade brings enhanced HDL conversion functionality

The MathWorks has unveiled the 2012a release of Matlab and Simulink development tools, expanding Matlab's ability to generate hardware description language (HDL) code that can be converted directly into digital logic and a systems-identification toolbox that is designed to ease the job of building and simulating electromechanical system models.

"This release enables pure Matlab users to generate HDL," said Hans Dürr, senior applications engineer at The MathWorks. The main aim, added Dürr, is to support engineers developing digital communications protocols and hardware who work primarily in the matrix-processing core of Matlab. Previous versions of HDL Coder worked with the Simulink system-modelling extension to Matlab, in which engineers wire together signal-processing blocks to develop models of an electronic system.

Alexander Schreiber, senior applications engineer at The MathWorks, adds: "We also added a workflow to convert from floating-point arithmetic to fixed-point in the Matlab world. We were already doing that in Simulink."

Fixed-point arithmetic is usually more efficient in hardware because it does not need additional logic to shift the radix point after each calculation. Many fixed-point algorithms also tune the bit resolution more finely to reduce the logic overhead whereas standard floating-point arithmetic on computers is usually only adjusted in 32bit increments. For calculations that may only need a resolution of 10 or 12bit, the overhead of 32bit or 64bit floating-point hardware is significant.

A further extension to the code generation is resource sharing, said Schreiber, allowing logic-hungry multipliers, and similar execution units, to be shared between different parts of an algorithm.

"You can optimise in terms of area and optimise in the time domain by adding hierarchically distributed pipelining," Schreiber said.

As well as generating hardware for implementation in custom chips for radio standards such as LTE Advanced, Dürr said the models would also be used to produce HDL for field-programmable gate arrays (FPGAs) so they could simulate the effects of fading and other interference when chip designs are exercised on emulators or FPGA breadboards.

A further change in Release 2012a is the introduction of a toolbox for system identification based on continuous-time transfer functions.

"With Simulink, we can provide the basis for simulating not just the controller in a system, but the controller inside its environment," Dürr said, "and traditionally, this requires that the user writes down the behaviour in mathematical form. Sometimes you don't have the time to do that or even the information to build that mathematical model.

"We have released libraries of mechanical models to help with this process, using standard blocks that represent solid bodies and joints. But in the latest release, users can employ an approach that is much more graphical. Now we allow users to more or less paint the kinematics of a system," Dürr explained. "It's enough to know the shape and density of an object to generate its inertial tensor that is needed to model the transfer function."

Schreiber added: "This now works in the continuous-time domain so that the user can get the transfer function for the complete control loop."

As well as launching the 2012a release at Embedded World this week, the MathWorks has set up a set of services to support automobile manufacturers and contractors as they adopt the recently-released ISO26262 standard.

More information:
www.mathworks.de/

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