A stacking die means each function can run on the best process

Communications designers grapple with material choices

The pressure to keep improving the performance and efficiency of communications hardware is forcing chip designers to consider new materials.

Intel added a number of materials to its chip-making recipe when it launched its 45nm manufacturing process for digital circuits. Realising that basic silicon technology was running out of steam, the company decided to look again at the Periodic Table for the elements needed to keep improving processors.

Intel chose rare-earth elements for the gate insulators of its 45nm process, instead of silicon. The resultant high-k dielectrics enabled it to build faster devices than were possible using the older ‘polynitride’ insulators of simpler nitrides and oxides of silicon. The company had already added germanium to the silicon in its transistors’ channels to strain them into conducting more freely, but the shift to high-k metal gates marked an era in which new materials have taken centre stage in chip-making. The communications industry is set to be one of the beneficiaries.

Trade-offs

Not all chipmakers are applying these new materials. Although communications engineers have had to use more exotic materials in their systems – such as gallium arsenide (GaAs) in handsets’ power amplifiers – cost has often encouraged them to focus on squeezing more out of silicon. The laterally doped metal-on-semiconductor (LDMOS) process for silicon has often turned out better than GaAs for basestation power amplifiers when practical considerations, such as price, are considered.

At the chipmaking industry’s leading conference on transistor design, last year’s International Electron Devices Meeting (IEDM), Qualcomm technology director PR Chidambaran said his company was yet to make a wholesale move to the advanced materials that Intel has been using, although high-end versions of its SnapDragon smartphone chipset may benefit sooner.

“We simulated a SnapDragon design for power and performance,” Chidambaran said. “We found that expensive high-k metal gates with strained silicon offer some of the best performance. For high-end, best-in-class processors, we will certainly have some exposure to high-k metal-gate with strain. But for volume, we’ll use more polynitride.”

The bulk of Qualcomm’s communications chip designs need low power consumption rather than performance. Chidambaran said that design tweaks can provide the improvements needed to apply the upcoming 28nm process and get higher performance, although with each new generation, the need to shift away from standard silicon increases.

Luc Van den hove, president of Belgian research institute imec, says: “We have so many options and so many materials. All of these technology choices will have a very important influence on the architecture. As complexity increases, we see a real need to reconnect system design and process.”

Becoming 3D

One option being explored by imec and others is to move chip architectures into the third dimension, making it easier to mix and match different materials and processes in a compact stack of chips. The performance improvements enabled by Moore’s Law scaling have traditionally encouraged manufacturers to move everything onto standard CMOS silicon, because it’s cheapest. In mobile phones, however, power amplifiers and similar functions have stayed off-chip because it was too difficult to move them to CMOS: circuits would often get bigger, negating the cost benefits.

Stacking chips creates more options for processes – you can use the best technology for each component and then package them together, potentially in less space than on a printed circuit board.

Phillippe Royannez, a researcher at the Singapore Institute of Microelectronics, said at the 3D Architectures Conference late last year: “Once you go to 3D, it’s completely different. You can put a lot of things into a cubic millimetre of silicon.”

So much so, argues Royannez, that the limiting factor in design becomes the other components: “Battery size is killing us.”

RF reversal

Despite the increased design freedom of 3D architectures, new materials will have to bring substantial benefits to displace silicon. In handsets, for example, the GaAs processes used to build RF devices are already under pressure. At IEDM, Intel engineer Chia-Hong Jan described how the company is augmenting the 32nm process it developed for microprocessors to handle radio frequencies. He said the company had hit an oscillation frequency of 445GHz with its latest process, up from 200GHz on a previous 90nm generation.

“We have seen a 20 to 30 per cent improvement per generation,” said Hong. “The performance is now very similar to silicon-germanium or III-V [materials].”

In larger systems, however, power and bandwidth requirements are driving developers to new material systems. Freescale last year decided to expand from LDMOS into GaAs and indium gallium phosphide (InGaP) microwave-range devices. NXP Semiconductors has also been a long-standing advocate of LDMOS but is broadening its horizons as it tries to build basestation power amplifiers with much greater bandwidths than existing designs.

Fred van Rijs, senior engineer at NXP, says: “We are using different types of process technology, such as gallium nitride [GaN] instead of LDMOS. It has to do with the output capacitance. It’s lower on GaN and therefore you can use simpler matching structures.”

GaN was originally developed for light-emitting diodes (LEDs) – its wide bandgap provides a bright blue colour that had long eluded makers – but the bandgap has advantages for amplifiers since it allows higher powers to be applied to a device before it breaks down. As basestation amplifiers only have to generate a limited amount of power, this advantage can be used to reduce the size of the device, which translates into higher bandwidth and lower output capacitance.

Silicon could still find its way into these designs through the addition of carbon and germanium. Although notoriously tough to deal with – even cutting through it to pull individual dice from a wafer is hard – silicon carbide has similar electrical properties to GaN and can operate at very high temperatures without breaking down. In principle, this will allow even higher power densities than GaN, making the process attractive not so much for basestations, which have a statutory output limit, but radar and other military applications.

Because SiC can handle high temperatures, some companies have proposed putting GaN active layers onto a SiC substrate. As well as handling difficulties, one downside is a lower electron mobility than either GaN or conventional silicon and so progress towards commercial SiC communications devices has been much slower than with GaN and other III-V materials.

Alloying silicon with germanium and carbon, NXP hopes to bring in a more manufacturable alternative to GaAs in designs that operate at higher frequencies than those used by 3G. The technology has already been used in GPS receivers but a new version of the SiGe:C process aims to extend its reach into radar systems operating at up to 200GHz.

While silicon remains the technology of choice for high-density logic in communications systems, there will always be a tension between it and other materials for other functions. As silicon’s physical limitations hit harder, process engineers will dig deeper into the Periodic Table to find ways to keep the communications industry on track.

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