Records to tumble at ISSCC

Performance, multicore, power and health set agenda

Next week's International Solid States Circuits Conference (ISSCC) is once more shaping up to highlight the 'biggest-tallest-shortest-longest' from among the current state-of-the-art for semiconductor design.

The event's main enterprise silicon session will feature the IBM zEnterprise 196 microprocessor, which has achieved the fastest clock frequency for an MPU to date. Engineers from Big Blue will explain how they realised a 5GHz clock speed on a 45nm silicon-on-insulator CMOS process.

Intel, the world's largest chipmaker, will be laying official claim to at least two other records. The latest version of its Xeon processor features 10 32nm Westmere cores, the largest number of x86 cores ever integrated in a single device.

The company will also unveil its new Itanium server processor which incorporates 3.1 billion transistors on a single 18.2 X 29.9mm die. That represents an increase of 50 per cent on the transistor count for the existing Itanium generation and is the largest number ever packed into a single chip.

The main theme for ISSCC 2011 is "Electronics for healthy living", which runs through panels, keynote addresses and parts of the technical programme.

Papers will include disclosure for Korean research KAIST of details on the first wireless body area network (WBAN) designed to the very low energy consumption (0.24nJ/b) requirements of the incoming 802.15.6 WBAN standard from the IEEE.

ISSCC takes place from 20 February until 25 February at San Francisco's Marriott Marquis hotel. Check back with E&T's online electronics page for regular updates on headline papers and speeches at the conference from next Monday 21 February.

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