Mentor joins ST-led alliance for 20nm technology
Mentor Graphics has joined a research project led by STMicroelectronics in France to develop design techniques and processes as far as the 20nm generation.
Since the Nano2012 programme went underway, initially as a French government-funded initiative that brought together ST and its manufacturing site at Crolles with the CEA-Leti research institute, IBM and ASML have joined. Mentor is now the fifth major member of the consortium and will hire more than 20 engineers as permanent staff to work on the project. Twenty-nine Mentor engineers will work on Nano2012 until its completion in a couple of years.
Gregory Hinckley, president of Mentor, said the company opened its first office in France in 1989 and now employs more than 100 R&D staff in the country.
“As a result, Mentor Graphics is the EDA company that has by far the most invested in France,” Hinckley claimed, adding that much of its position in France was driven by its relationship with ST.
“The Nano2012 collaboration represents a natural extension of Mentor’s commitment to the French technology sector,” said Hinckley. The programme also provides an opportunity to try out ideas and algorithms in a leading-edge chip development project, he noted.
The Nano2012 programme involves, as well as core technology development down to the 20nm process that ST plans to introduce at its Crolles fab, the design of a full 28nm-generation chip.
“Mentor will have an unprecedented opportunity to accelerate EDA capabilities,” Hinckley claimed. “Mentor will be able to immediately validate EDA techniques for 28nm and below and critical, adjacent technologies such as mixed-signal, RF and 3D packaging.”
Philippe Magarshack, group vice president of ST’s central R&D group, said the aim is to be able to produce devices at Crolles using process geometries ranging from 32nm down to 20nm by the end of the programme.
The plan is to have a working 28nm device produced at Crolles within 18 months to two years. Magarshack said the company has produced working silicon on the prototype 28nm process at IBM’s fab in East Fishkill with the aim of having devices produced by foundries once that generation is up and running.
“We plan to tape out at the end of this year with one of the [IBM] alliance partners,” said Magarshack. “But our company has decided to be able to do volume production inhouse. We will demonstrate the fab capability of ST in 2012 at a time where we believe there will be volume production of the 28nm node.”