Xilinx to join Altera with TSMC 28nm move
Xilinx will for the first time use the same foundry as its main competitor to make its next generation of programmable logic devices and expects to have parts built on a 28nm process by the end of the year.
Xilinx has nominated Taiwanese foundry TSMC as one of the two suppliers it plans to use to make field-programmable gate arrays (FPGAs) on the upcoming 28nm process – which is expected to double density compared to the current 45/40nm-based parts.
Historically, Xilinx has used the world’s second largest foundry UMC as its silicon supplier. Although the FPGA maker has turned to a number of foundries since the 130nm generation, including IBM, Samsung and Toshiba, the company has up to now avoided using TSMC.
Chuck Tralka, senior director for product definition at Xilinx, said when the company looked at how it would move on from the 45nm generation, “we began a survey of process nodes. Originally, we looked at 32nm and then moving to 28nm.”
The company then decided to move straight to 28nm, opting for variants of a high-k, metal-gate process that trade some performance for lower static power consumption, which increases with the number of transistors on a die.
“As we looked out at the process vendors. We began with a survey of what we expect to become available from the various foundries. We began looking with an eye to managing the performance issues. We talked to each of the potential foundry partners,” said Tralka.
“We determined that TSMC and Samsung had the right technology available. We worked with TSMC two years ago and started running test vehicles and began aligning process parameters with internal simulations. We expect to have devices available by the end of the year.
“We are working with both partners: one of them is in the lead,” said Tralka, but declined to say which foundry is likely to have products ready first.
“Both processes are actually fairly similar. They are both high-k, metal-gate and they have similar power/performance characteristics. We work to try to align the processes as much as possible. There are some differences. The families will get tweaked as we prepare to map one for each process or another.”
“What we will be doing is mapping particular families into particular fabs. And aligning what we think are the best power-performance trade-offs.”
Tralka claimed the long-standing relationship between Altera and TSMC “is not that big a concern. It is something that we have thought about. But TSMC does a good job working closely with each of their partners without compromising the work of their partners.
“Our foundry has been a multi-foundry strategy. We are a larger company company and we need more capacity available to us. And our strategy has been to choose the best partners for each node rather than wedding ourselves to a single process partner,” Tralka explained. “It’s possible that we will make different choices in future generations.”
For the 28nm generation, Xilinx will bring the Virtex and the low-cost Spartan families closer together, with both types of FPGA to use a common architecture.
“Spartan and Virtex started out with a common architecture. Since that time, the families have had independent evolutionary paths. That has created a problem in that IP development and IP migration has become more difficult for customers as those architectures have diverged. We are converging the architectures. It is important for customers to migrate designs up and down,” Tralka claimed. “We are unifying all the basic building blocks, such as block RAM, DSP slices and lookup tables. Where we will be differentiating is in I/O capability and I/O performance. And there are some power/performance adjustments that we will make.
“Performance has become an I/O issue,” Tralka added.