TSMC to make low-power high-k 28nm chips

TSMC is to follow the Common Platform partners in developing a low-power version of a sub-32nm high-k, metal-gate process. The Taiwanese foundry had previously indicated that an evolution of its silicon oxynitride (SiON) process would be the main low-power process for the 28nm node.

TSMC expects the new process will enter risk production in the third quarter of 2010. It will follow the high-speed, higher-power HKMG process by one quarter and the low-power (LP) SiON process by two quarters. IBM and the Common Platforms unveiled a low-power version of the 32nm HKMG process last year, with plans to update it for their 28nm ‘half-node’.

To be called 28nm HPL (low power with HKMG), the process will be more expensive than the SiON version and will use the same gate-last approach as the higher-power version.

“The addition of the 28nm HPL to the 28nm technology family, combined with the 28LP and 28HP, means that TSMC now provides the most comprehensive 28nm technology portfolio,” claimed Mark Liu, senior vice president of TSMC’s advanced technology business.

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