Tensilica gets Docomo cash in move to 4G market
The capital arm of Japanese telecom operator Docomo has decided to invest in Tensilica as the processor-core developer gears up to provide designs aimed at the next generation of cellular terminals.
Tensilica has launched a processor architecture designed to cope with 4G communications systems, claiming that its multicore ‘dataplane processing unit’ (DPU) design based around the company’s Extensa CPU can yield performance much higher than traditional digital signal processor (DSPs).
“We recognise the growing importance of Tensilica’s customisable DPUs for semiconductors that enable lower power and innovative mobile devices, and that’s why we made this investment,” said Tomoya Hemmi, president and CEO of Docomo Capital.
Chris Rowen, CTO of Tensilica, acknowledged that there are a number of incumbent silicon suppliers with large shares of the cellular handset market who are moving towards 4G. But he insisted that a market for cores that target this business is opening up, particularly in the Far East.
“We have gone after it because there is such a wide variety of customers in the market. There are those who are comfortable with taking Extensa and extending it in a proprietary fashion, using it as a basic building block for baseband. There are others who say they would like to have more of a start. We came up with architectures suitable for the computational demands of LTE and the soup of digital demodulation standards in broadcast,” said Rowen.
“There are enough system OEMs building their own platforms out there. And there is a vast number of semiconductor guys who say they need state-of-the-art DSP building-blocks too,” Rowen added. “The Extensa technology can solve the more idiosyncratic problems that are not solved by inhouse DSP platforms. And there are new handset players in Asia who don’t have an inhouse proprietary DSP.”
Rowen argued that the new crop of Asian handset makers favour using their own silicon over buying in ready-made parts from silicon suppliers because it gives them more control over component costs. “Cost-down is the mantra in Asia,” he noted. “If they can find a way to save some money by doing it themselves by leveraging their supply chain then of course they will do that.”
The core of the main baseband processor is a very long instruction word (VLIW) processor with the ability to drive three eight-way single-instruction multiple data (SIMD) execution units in parallel. Rowen argued that the main difference about the Connex architecture is that this processor fits into a larger array of standard and custom processing engines linked by shared memory and point-to-point interconnects that allow them to work in parallel more efficiently than conventional schemes.