Accellera and Spirit to merge
Accellera and the Spirit Consortium have decided to merge their operations to form a standards-creating body that spans electronic design automation from low-power design to hardware intellectual property (IP).
Shrenik Mehta, chairman of Accellera, said the organisation had been looking harder at developing standards around IP for chip design. “IP has become a more important component. We looked towards the future and how work in this area could benefit the industry. Spirit was a complementary effort and we felt that if we merged together we would get a stronger organisation that can address the industry’s needs, covering the entire spectrum of design verification and IP reuse.”
Mehta insisted the primary goal of the merger was to pull the verification and IP standardisation efforts together. Any operational-cost savings were “considered a benefit of the merger: an outcome rather than a goal”.
Mehta said details of the merger are still to be worked out. It should complete next year, so that the new entity can start once the respective current financial years of Accellera and Spirit have finished.
“A board from both organisations is being put together that will look at the by-laws, the technical work and things such as the website. We will provide more details at our DAC event [in late July],” said Mehta.
Ralph von Vignau, president of Spirit, said: “There will be some changes or adaptions but because the organisations are reasonably close in methodology and tools and ways of working. We are not going to see very big changes.
“I think by DAC we will be have the ability to offer a good description of the organisation and what it means for the membership.”
The two organisations started looking at the possibility of a merger in the last year. “Probably the majority of it crystallised this year. But it was not as if we hadn’t looked at this before. Industry conditions contributed, to say we need to accelerate this,” said von Vignau.
Von Vignau said there are opportunities to have closer co-operation between the verification and IP sides of the future Accellera in areas such as low-power design. “We are going to start to work on constraints very heavily,“ he said, so that IP cores come with information to show whether they are power-aware and whether they can be switched on and off.