Radio waves of progress
As CMOS becomes more capable engineers are using it for RF work, but development has not stopped on the III-V processes that used to be essential, reports E&T.
The development of processes for radio-frequency (RF) operations is heading in two distinct directions. At the same time that process technologies originally proposed for RF are looking more promising as a successor to digital CMOS, so RF designers are expecting to use silicon CMOS even for power amplifiers.
Rather than expecting fab owners to tweak their processes for mixed-signal or RF functions, designers are now expecting to have to work with the basic digital CMOS technology that was put together for almost completely digital SoCs.
However, there are still important differences between the various foundry processes on offer, even though many of the leading suppliers have aligned their technologies in small groups - and problems that make digital design difficult are worse for RF circuits.
Variability is a potential nightmare for the much more sensitive analogue and RF circuits now migrating on-chip.
Designers working on RF recommend getting an early grip on characterising and modifying architectures to suit the new environment. Some companies, such as CSR, have adopted software control as a way of improving the reliability of circuits under increasing variability.
However, software control only works if you have an accurate picture of what the RF circuitry will do - and that means accurate models. Traditionally, the quality of device and circuit models written for Spice simulators, particularly during the early days of a process, have not been good, but these have improved as interest in RF CMOS has increased.
Although commercially there is a drive to use standard foundry processes for RF, researchers are working on ways to tune CMOS for better performance.
A Fujitsu team has developed a specialised MOSFET that can make it possible to put a power amplifier on a 45nm CMOS process. Using a self-aligned silicide and modulation-doped channel, they achieved an on-resistance of just 1.7Ωmm with a breakdown voltage of 10V and output power density of 0.6W/mm.
Fujitsu claims the transistor design can support an fmax of 43GHz, pointing to the potential of a single-chip CMOS transceiver and amplifier.
The processes that used to be essential at high frequencies are moving upstream. At IEDM last year, researchers from the Massachu-setts Institute of Technology (MIT) described a transistor design based on III-V elements that reaches into the terahertz domain.
The 30nm gate-length device is based on the combination of indium, gallium and arsenic. The better transport properties of these III-V materials lead to speeds that promise to be a factor of two better than silicon.
The III-V devices being proposed are quite different to those currently used in cellphone power amplifiers and military radar systems. Today, GaAs is predominantly a bipolar transistor technology. Researchers are talking about making metal-on-semiconductor field-effect transistors (MOSFETs) out of GaAs and more exotic materials.
Indium antimonide (InSb) and indium gallium arsenide (InGaAs) are strong candidates. Indium antimonide in particular has a very low bandgap and voltage limitations but very high electron mobility. Although MIT has focused on InGaAs, Intel and Qinetiq have been investigating the possibility of using InSb as a high-speed, low-power logic family.
Although the short channel-length devices suffer from high gate leakage and short channel effects - both problems now plaguing silicon CMOS transistors - the best of the III-V designs consume a tenth of the power of silicon devices for a given switching frequency and with a lower gate delay.
Several years ago, using InSb as the transistor channel material sitting on top of a GaAs wafer, Intel and QinetiQ built transistors with a gate length of 85nm that drew ten times less power than comparable silicon transistors but proved to be 50 per cent faster. At last year's IEDM, Intel and QinetiQ described a follow-on technology with a gate less than half that length, measuring 40nm.
Hole mobility in the InSb p-channel built in the 40nm devices reached 1,230cm2/Vs, three times that of a comparable silicon channel. Although the technology will have to move to silicon wafers to be commercially viable, the latest devices were built on a GaAs wafer, as before. GaAs works better as a substrate for the III-V materials even in these days when strain engineering has made it possible to deposit germanium on top of silicon. Even then, the 40nm device, like the other III-V MOSFETs, needs a large number of buffer layers to minimise defects in the main InSb quantum-well layer.
There is another problem: InSb is highly reactive. The material oxidises readily, which makes it difficult to put a gate dielectric on top that does not disrupt the electrical properties.
Getting an insulating-oxide gate to sit on top of any III-V material is a challenge. Freescale Semiconductor came up with an approach several years ago that could work for GaAs. It was the lack of a stable native oxide for gallium that prevented the use of the III-V material in MOSFETs. In 2006, the Freescale team demonstrated for a first time functional devices - both enhancement- and depletion-mode - using a gate dielectric made from a mixture of gallium oxide and gadolinium gallium oxide.
Another material has been used by Weixiao Huang at Rensselaer Polytechnic University - and may prove useful beyond the major focus of high-integration CMOS. Gallium nitride is tuned for high power output and Huang has found a way to make insulated-gate FETs using the material.
The GaN transistors can work in hot, harsh and high-power environments and are built on a sapphire substrate, similar to high-power silicon-on-insulator devices. In contrast to earlier GaN FETs, which had silicon nitride gates, Huang was able to use the more mainstream silicon dioxide.
Although materials such as GaN sound promising, it is worth bearing in mind how silicon has challenged the III-V materials in high-power RF. Today, laterally diffused metal oxide semiconductor (LDMOS) technology has successfully pushed further and further into territory previously claimed by GaAs and its relatives, now used in the Doherty amplifiers in wireless basestations among others (see article on p74). In some cases, the high-voltage capability of LDMOS, which uses a specialised structure to increase the breakdown voltage, has supplanted the lower-voltage GaAs technology. Once again, design has shown that there is plenty of potential in reasonably mainstream processes that tend to shove the exotic materials out of the way.