Eve implements own synthesis for emulation
Eve is to start offering its own synthesis support so that it can handle large designs more easily in its ZeBu emulation systems, which are based on field-programmable gate arrays (FPGAs).
“Only an FPGA-based emulator can save the day when it comes to full system validation,” claimed Lauro Rizzatti, Eve USA’s general manager and marketing vice-president. “New designs reach tens of millions of ASIC-equivalent gates, with processor and graphics designs moving well into several hundreds of millions gates. Mapping such large designs into a large array of FPGAs break many commercial FPGA synthesis tools. zFAST was developed for these types of designs.”
Supporting all three major design languages –– VHDL, Verilog and SystemVerilog –– Eve claimed zFAST typically runs over one order of magnitude faster than existing FPGA synthesis, mapping large designs with a small increase in area compared to equivalent tools. The software can run in parallel on several PCs.
The synthesis software keeps register transfer level (RTL) signals so that ZeBu can generate standard waveform files with RTL signal names. The tools supports module-by-module synthesis, as well as top-down synthesis. It includes a synthesisable library of FPGA components based on the Synopsys DesignWare library.
The ZeBu compiler will continue to support commercial FPGA synthesis tools for smaller designs