Interference scales on-chip lines to 25nm

A team of researchers at the Massachusetts Institute of Technology (MIT) has developed a way of drawing features on chips that are spaced just 25nm apart but using wavelengths of light that are even longer than those used today in lithography.

The team used an interference technique to allow a laser operating at a wavelength of more than 300nm to pattern parallel lines over an area of several centimetres squared that were 25nm wide and 25nm apart. The ‘nanoruler’ can produce very thin lines which in its current form, are spaced at least 200nm apart. By performing the operation four times, the MIT team was able to produce the dense array of lines.

“It is only because of the great phase control and repeatability of the tool that the pattern placement and metrology that we can do that,” said Ralf Heilmann of the MIT Kavli Institute of Astrophysics and Space Research.

To achieve the necessary overlay control, graduate student Yong Zhao developed a phase-detection algorithm and fellow student Chih-Hao Chang came up with an image-reversal process.

To generate the patterns, MIT’s scanning-beam interference lithography uses 100MHz sound waves to control how light is diffracted and phase-shifted by a crystal. Splitting the beam and controlling using the crystals generates the necessary interference patterns.

“The sound waves are generated in acousto-optic modulators. We are creating a density wave inside the crystal,” said Heilmann. “We use a transducer to change the properties of the sound wave at a very fast rate. We have updates rates of 10kHz or so. Changing the sound wave changes slightly the phase of the light wave that goes through the crystal.

In its current form, the scanning-beam interference lithography can only make parallel lines. “We are working on changing the optical design to do a greater variety of patterns,” said Heilmann but he noted that the technique could be combined with conventional lithography to produce dense chip designs as sub-65nm layouts from companies such as Intel have started to use more regular structures. In this approach, long lines could be patterned across the surface of the wafer and then cut into gates, for example, using an existing stepper. This type of double patterning is already used by Intel on conventional steppers.

Potentially, the technique could scale further as the MIT team is using a wavelength of light that is 50 per cent longer than that used in today’s steppers. “The pattern pitch depends on the wavelength of the laser and the angle at which the two beams interfere,” said Heilmann.

Recent articles

Info Message

Our sites use cookies to support some functionality, and to collect anonymous user data.

Learn more about IET cookies and how to control them