SiliconBlue aims to cut power in consumer
Programmable-logic startup SiliconBlue has launched a family of low-power parts with which the company hopes to displace Actel’s Igloo and the Altera Max-II from battery-powered consumer appliances.
SiliconBlue has used a non-volatile memory cell developed by Kilopass to jump two process nodes ahead of Actel and Altera and a series of circuit tweaks to reduce the power consumption of its parts over the competition. SiliconBlue is using TSMC’s 65nm process to make the iCE family of FPGAs. Using a conventional flash memory cell, Actel and Altera currently use a 130nm process. Moving to a more advanced process allows SiliconBlue to offer denser parts at a given cost and reduce active power consumption.
Kapil Shankar, CEO of SiliconBlue, claimed: “Our two-process generation lead, gives our customers an unprecedented two to five times price advantage over competing non-volatile PLDs.”
However, leakage concerns increase for more advanced processes. So, the company has concentrated on circuit techniques that can ameliorate that problem in an FPGA that uses a conventional four-input lookup table structure. According to the company, the FPGAs use high threshold-voltage, low-leakage transistors except in critical paths such as the arithmetic carry chain. On top of that, critical path circuitry is powered down when not used.
The standard core voltage for full-speed operation in the tens of megahertz is 1.2V. A 1.0V mode reduces standby power by 50 per cent, with the parts running at a typical clock speed of 32kHz. Further changes to reduce power consumption include actively driven interconnect lines rather than using pass gates to connect cells together.
Similar to the Max-II parts, the non-volatile memory stores the configuration on-chip which is then loaded during boot-up into the actual SRAM-based configuration cells. SiliconBlue claims power consumption of 9mW for a part containing 3500 for circuits running at around 32MHz. In the slow or standby mode, this drops to around 25µW.
Image: A portion of the iCE FPGA